1. Field of the Invention
The invention relates in general to a temperature compensation circuit and a method for sensing memory, and more particularly to a temperature compensation circuit and method capable of decreasing the temperature influence.
2. Description of the Related Art
FIG. 1 (Prior Art) is a schematic illustration showing a conventional memory 100. The memory 100 includes a plurality of bit lines BL1 to BLm, a plurality of drain select switches, a plurality of memory cell strings and a plurality of source select switches. For example, the bit line BL1 corresponds to a drain select switch MD, memory cells 200 to 231 and a source select switch MS. The drain select switch MD is controlled by a control signal DS, the memory cells 200 to 231 are respectively controlled by word line signals WL0 to WL31, and the source select switch MS is controlled by a control signal SS.
FIG. 2 (Prior Art) shows a read timing chart of the conventional memory. At time T1, a read compare voltage, such as 3V, is applied to a word line WL_sel corresponding to a to-be-read target memory cell so that the data stored in the target memory cell can be determined. Meanwhile, a read pass voltage, such as 5V, is applied to a word line WL_unsel corresponding to other memory cells. At time T2, the control signal DS turns on the drain select switch MD to charge the bit line WL0 to about 0.7V and to make the voltage of the bit line WL0 become floating.
At time T3, the control signal SS controls the source select switch MS to turn on. If the target memory cell has a low threshold voltage, a discharge path is generated to lower the voltage of the bit line BL1. On the contrary, if the target memory cell has a high threshold voltage, the voltage of the bit line BL1 is held. So, at time T4, the voltage of the bit line BL1 is sensed. If the voltage of the bit line BL1 is still held at the voltage of 240, the target memory cell has the high threshold voltage; and if the voltage of the bit line BL1 is lowered to the voltage of 242, the target memory cell has the low threshold voltage. Consequently, it is possible to judge whether the data stored in the target memory cell is 0 or 1.
However, the memory cell current is associated with the temperature. With the change of the temperature, the discharging current I may be increased so that the voltage change of the bit line BL1 is increased. For example, when the target memory cell has the high threshold voltage, the voltage of the bit line BL1 is slightly lowered to the voltage of 244. When the target memory cell has the low threshold voltage, the voltage of the bit line BL1 is further lowered to the voltage of 246. Consequently, different bit line voltages at the sensing time T4 may cause the read window loss. FIG. 3 (Prior Art) is a graph showing a bit line voltage of a target memory cell of the conventional memory versus time. As shown in FIG. 3, the read window loss ΔV is caused if the sensing operation is performed at the same time T4 but different corresponding temperatures t1 and t2.